Integrated delay circuit for digital signals

US4618788A · kind A · utility

Assignee

• ITT Industries · US

Inventors

• Reiner Backes · Glückstadt, DE
• Ulrich Langenkamp · Ottobrunn, DE

Key dates

• Filing date: Feb 15, 1984
• Grant date: Oct 21, 1986
• Expiry date: Feb 15, 2004

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K2005/00097
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A delay circuit provides adjustable delay in constant increments. In order to achieve adjustable but constant delay times of a chain of inverter pairs, each pair is completed by a capacitor, a third inverter, and a transfer transistor the gate of which is fed by a voltage controlling the pair delay time. This voltage is generated by a control circuit measuring the actual delay time of the chain with respect to the period of a constant clock signal.