Transformation circuit for implementing a collapsed Walsh-Hadamard transform
US4621337A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 1983 |
| Grant date | Nov 4, 1986 |
| Priority date | — |
| Expiry date | Aug 11, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/145
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A unit transformation circuit transforms three discrete input signals into a set of transform coefficient signals characteristic of a "collapsed" Walsh-Hadamard transform. The unit transformation circuit includes two tiers of arithmetic networks. In the first tier, a pair of arithmetic networks generates (A) first sum and difference signals from the first and second input signals and (B) second sum and difference signals from the second and third input signals. Arithmetic networks in the second tier generate a set of coefficient signals from (A) the sum of the first and second sum signals (B) the sum of the first and second difference signals and (C) the difference between the first and second difference signals. The unit transformation circuit forms a fundamental circuit element from which more complex circuits are constructed capable of transforming larger numbers of discrete input signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.