Non-volatile semiconductor memory
US4622656A · kind A · utility
100Cited by
2References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 15, 1983 |
| Grant date | Nov 11, 1986 |
| Priority date | — |
| Expiry date | Dec 15, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/685
Abstract
This invention relates to the reduction of programming voltage in a non-volatile memory of the type having a double gate structure composed of a select-gate and a floating-gate. A channel region under the select-gate is highly doped and a channel region under the floating gate is lightly doped or doped to opposite conductivity type. Due to the different doping concentrations between these two channel regions, a large and steep surface potential gap appears at the transition region between the select-gate and the floating-gate in the programming operation thereby reducing the programming voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.