Apparatus for interfacing between at least one channel and at least one bus
US4625307A · kind A · utility
32Cited by
2References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 13, 1984 |
| Grant date | Nov 25, 1986 |
| Priority date | — |
| Expiry date | Dec 13, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A coherent interface between one or more asynchronous busses and one or more channels in which only one channel is permitted to communicate with a bus at a time is disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.