Addressable transducer with improved address signal processing
US4628315A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 16, 1983 |
| Grant date | Dec 9, 1986 |
| Priority date | — |
| Expiry date | Aug 16, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q9/14
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An addressable transducer is disclosed for use in a monitoring system of the type including a central station and multiple addressable transducers for monitoring physical conditions. The transducer is connected across a single pair of transmission lines having a voltage thereon modulated at controlled intervals to produce successive binary address signals. Each address signal is produced as a level shift, pulsewidth modulation of the line voltage. An address signal processing circuit includes a memory for storing multiple bits of an assigned address signal. A multiplexer coupled with the memory and operated under clock control derived from the transmitted address signal generates a train of pulses representing the stored address signal in bit-by-bit synchronism with the train of pulses of the transmitted address. A match detector pairs the trains of the pulses and a match counter produces a control signal in response to a match of all bits of the addresses. An electronic switch responds to the control signal and energizes a current sink oscillator in the line voltage for producing a modulating current of the transmission line having a frequency corresponding to the measured conditi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.