Packet switched multiport memory NXM switch node and processing method
US4630258A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 1984 |
| Grant date | Dec 16, 1986 |
| Priority date | — |
| Expiry date | Oct 18, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/40
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A packet switching node which processes applied data packets containing routing tag signals indicative of the output port destination to which the data packets are to be applied. The invention comprises an N.times.M switch node that accepts data packets at any of N input ports and routes each to any of M output ports. The output selected is determined by the routing tag signal in the packet. The node comprises a multiport memory having a predetermined number of memory locations available for storage of data packets applied to each of a plurality of input ports. Control logic coupled to the input and output ports and memory is designed so that the data packets are effectively sorted according to their desired output port destination. The control logic comprises arbitration logic which randomly, in a statistical sense, chooses among any data packets that are directed to the same output port. The algorithm implemented by the arbitration logic is designed so that data packets will not wait indefinitely to be routed from the switch node. A method in accordance with the present invention comprises sorting and storing the data packets based upon the output port destination and then arbitr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.