Fail-safe data processing system
US4631661A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 1986 |
| Grant date | Dec 23, 1986 |
| Priority date | — |
| Expiry date | Mar 19, 2006 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2041
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A fail-safe multiprocessor system comprises processors connected through a switching unit which forms a data transfer channel between the processors. This switching unit comprises mechanical switches that can selectively connect peripheral units (e.g., display units) with one of the processors. The transfer device constitutes, from the standpoint of each of the connected processors, a normal peripheral unit. The switches are set either manually or automatically under program control by each of the processors. In the case of an error or failure, the data processing system is reconfigured such that the high priority tasks together with their associated peripheral units are transferred from the failed processor to a processor which is still intact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.