Method for interconnecting the active zones and/or the gates of a C/MOS integrated circuit
US4632725A · kind A · utility
8Cited by
5References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 15, 1985 |
| Grant date | Dec 30, 1986 |
| Priority date | — |
| Expiry date | Mar 15, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76885
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for interconnecting the active zones and/or the gates of a C/MOS integrated circuit characterized in that, after producing the constituent elements of the integrated circuit with the exception of the connections, on the complete circuit is directly deposited a coating of a conductive material, which is then etched in order to form the desired connection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.