Multiple channel analog-to-digital converters
US4633226A · kind A · utility
14Cited by
9References
37Claims
0Family size
Inventor
Key dates
| Filing date | Dec 17, 1984 |
| Grant date | Dec 30, 1986 |
| Priority date | — |
| Expiry date | Dec 17, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/0629
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An arrangement for reducing error in an interleaved analog-to-digital signal conversion system. The arrangement provides matching and adjustment certainty as the basis for such error reduction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.