Entry error elimination for data systems
US4633228A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 2, 1984 |
| Grant date | Dec 30, 1986 |
| Priority date | — |
| Expiry date | May 2, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01H2239/012
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Switch assembly, such as a keyboard switch assembly, comprises a plurality of polled conductors, a plurality of scanned conductors, and switch sites, each of which has an associated scanned conductor and polled conductor adjacent thereto. When a switch at each switch site is closed, the associated polled conductor is connected to the associated scanned conductor and closure of the switch is determined by a polling and scanning means. Each switch has a switch resistor in series therewith and each scanned conductor has a scanned conductor resistor between the scanned conductor and one side of the power supply. The analyzer associated with the switch assembly has the ability to determine whether a signal indicating that a particular switch is closed is a true signal caused by actual closure of the signal or alternatively is a phantom signal caused by the closure of a group of switches in the switch matrix. The determination is made on the basis of the difference in voltage detected when a true switch closure is made and when a phantom switch closure is indicated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.