Self-configuring digital processor system with logical arbiter
US4633392A · kind A · utility
84Cited by
8References
8Claims
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Assignee
Inventors
Key dates
| Filing date | Apr 22, 1985 |
| Grant date | Dec 30, 1986 |
| Priority date | — |
| Expiry date | Apr 22, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/161
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital processor system including several function modules where each modules includes circuitry to perform at least one computational task and circuitry to transfer information containing that module's respective computational task capability to a logical arbiter upon initialization. Each module further includes circuitry to interface to the logical arbiter upon initialization to determine that module's address. Further disclosed is an information bus that connects all function modules together with the logical arbiter. The presence of the logical arbiter provides for a self-configuration capability upon initialization.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.