Patent · US Expired

Superconducting read-only memories or programable logic arrays having the same

US4633439A · kind A · utility

16Cited by
3References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 20, 1983
Grant dateDec 30, 1986
Priority date
Expiry dateJul 20, 2003

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S505/832
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

An A.C. powered type logic array of very high speed operations which employs Josephson devices and which can program any desired logic. The logic array comprises a first logic array which delivers AND logic signals of desired ones of input signals, and a second logic array which delivers OR logic signals of desired ones of the AND outputs. Each of the first and second logic arrays comprises a plurality of bit lines which connect a plurality of arrayed Josephson devices in series at respective rows and each of which has one end connected to a power source and the other end grounded through a resistor, and word lines which are arranged in the column direction of the Josephson device array and which are selectively coupled to the Josephson devices. Whether or not the word lines are coupled to the respective Josephson devices of the arrays, is determined by the patterns of the word lines or the patterns of the Josephson devices, thereby to program the desired logic.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.