Bit synchronizer for decoding data
US4635280A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 1985 |
| Grant date | Jan 6, 1987 |
| Priority date | — |
| Expiry date | May 28, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A bit synchronizer for Miller-encoded data includes a phase-locked loop for synchronizing the Miller-encoded data to the clock signal necessary for proper decoding thereof. The phase-locked loop includes a monostable multivibrator that is triggered on each transition of the Miller-encoded data. The monostable multivibrator controls the operation of two flip-flops that produce time-varying signals when the clock is leading or lagging the Miller-encoded data. The flip-flop output signals are constant when the clock is in phase with the Miller-encoded data. The flip-flop output signals are integrated, and the resultant signal controls a voltage-controlled oscillator so that the clock signal is phase coherent with the Miller-encoded data signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.