Variable phase signal demodulator
US4636736A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 1984 |
| Grant date | Jan 13, 1987 |
| Priority date | — |
| Expiry date | Jul 26, 2004 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S331/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A dual conversion variable bandwidth telemetry receiver employs a phase locked loop which controls the second local oscillator to maintain lock on the carrier frequency; the phase locked loop employing a loop filter with a variable time constant integrator, the time constant of which can be varied as a function of receiver bandwidth and the integrator with its associated capacitor and resistor banks being employed in a sweep, i.e. search, oscillator circuit enabled when the carrier signal is lost. A coherent double-balanced mixer is employed to detect carrier lock and if lock is lost but the carrier is still detected, a rapid response anti-sideband circuit in the phase detector of the phase locked loop is employed to suppress the sidebands and greatly increase the probability of relocking on the carrier. A synchronous AM detector employs quadrature IF and reference signals at the same frequency to produce a dc signal when phase lock occurs; the signal falling rapidly upon loss of lock. The synchronous AM detector employs a variable time constant integrator for eliminating noise above a low frequency to accommodate carrier fading, said integrator being located in an AGC circuit of a…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.