Automatic signal delay adjustment method
US4637018A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 1984 |
| Grant date | Jan 13, 1987 |
| Priority date | — |
| Expiry date | Aug 29, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for automatically adjusting the propagation time delay of an electrical circuit, such as an integrated circuit chip. In a preferred embodiment, the method is employed to de-skew the clock outputs provided by a plurality of clock distribution chips having different signal propagation times. In a preferred implementation of the method, feedback circuitry including a multi-tapped delay line and an accurate constant delay are employed in conjunction with a phase comparator for automatically adjusting the propagation delay of each chip to provide substantially the same constant delay relative to a main system clock for the clock outputs provided by the clock distribution chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.