Power interlock system and method for use with multiprocessor systems
US4639864A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 1980 |
| Grant date | Jan 27, 1987 |
| Priority date | — |
| Expiry date | May 6, 2000 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/173
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multiprocessor system the kind in which two or more separate processor modules are interconnected for parallel processing. The multiprocessor system includes an input/output system having multi-port device controllers and input/output buses connecting each device controller for access by the input/output channels of at least two different processor modules. The multiprocessor system includes a distributed power supply system which insures non-stop operation of the remainder of the multiprocessor system in the event of a failure of a power supply for a part of the system. The distributed power supply system includes a separate power supply for each processor module and two separate power supplies for each device controller. A power interlock system and a method are provided for protection against data corruption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.