Distributed pattern generator
US4639919A · kind A · utility
41Cited by
12References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 19, 1983 |
| Grant date | Jan 27, 1987 |
| Priority date | — |
| Expiry date | Dec 19, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31926
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An array testing apparatus includes a plurality of pin pattern generators for individually generating serial bit sequences required at each pin of a device under test during the testing operation. The individual pin pattern generators receive starting addresses from one or more programmable controllers and each pin pattern generator then performs a subroutine to repeat basic patterns or combinations of basic patterns as necessary. Both the pin pattern generators and the programmable controllers may include loop logic for obtaining the desired repetition sequences.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.