Method for the registration and representation of signals in the interior of integrated circuits by considering edge steepness and apparatus for implementing the method
US4642566A · kind A · utility
1Cited by
3References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 19, 1984 |
| Grant date | Feb 10, 1987 |
| Priority date | — |
| Expiry date | Jul 19, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/302
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A respective threshold circuit is provided for defining upper and lower thresholds representing logic levels of signals occuring within integrated circuits. The chronological position of a signal edge and the steepness of the signal edge are defined with the assistance of the two thresholds.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.