Shared memory with two distinct addressing structures
US4642755A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 31, 1983 |
| Grant date | Feb 10, 1987 |
| Priority date | — |
| Expiry date | Mar 31, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/167
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A communication method and digital multi-customer data interface for interconnecting a number of customer terminals to a main packet switching network of a local area data transport system that provides data communication services such as interactive video text service between data service vendors and customers. The digital multi-customer interface utilizes a main processor, control circuit, and multi-customer protocol controller to implement the protocol functions for the communication of packets and control information over individual serial transmission paths. The multi-customer protocol controller comprises a control processor and a formatter circuit for synchronously communicating packets for a plurality of customer terminals via customer line units and customer lines. The control circuit handles communication of all control and status information between the main processor and the customer line units. The control processor includes a shared memory and first-in first-out memories that are used to communicate messages with the main processor. Both processors address the shared memory with logical addresses, and the control processor's logical address space is structured so as t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.