Method of manufacturing nonvolatile semiconductor memory device by forming additional impurity doped region under the floating gate
US4642881A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 1985 |
| Grant date | Feb 17, 1987 |
| Priority date | — |
| Expiry date | May 17, 2005 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/082
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a nonvolatile semiconductor memory device having a gate oxide layer including a relatively thin silicon dioxide layer. This gate oxide layer including the thin silicon dioxide layer is formed by the steps of forming the gate oxide film on a semiconductor element region in a silicon substrate; removing a portion of the gate oxide film to expose a portion of the silicon substrate; implanting impurity ions in the exposed portion of the substrate to an extent that a peak concentration of the impurity ions exceeds a solid solution limit at a temperature of the following thermal annealing step; activating the implanted impurity by thermal annealing so as to form a high impurity concentration layer and thermally oxidizing a surface of the high impurity concentration layer to form the thin silicon dioxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.