Patent · US Expired

Process for fabricating dimensionally stable interconnect boards

US4645552A · kind A · utility

108Cited by
28References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 19, 1984
Grant dateFeb 24, 1987
Priority date
Expiry dateNov 19, 2004

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10T29/49165
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

We disclose a process for manufacturing multilayer circuit boards which includes providing a conductive, or an insulating substrate with a conductive pattern thereon, and then transferring and firing a glass-ceramic tape layer to the surface of the substrate. This tape layer provides both electrical isolation between the substrate and electrical conductors or electronic components which are subsequently bonded to or mounted on the top surface of the glass-ceramic tape layer. By providing vertical electrical conductors by means of vias in the tape layer prior to firing the tape layer directly on the substrate, good X and Y lateral dimensionally stability of the tape material is maintained. In addition, a high quality thick film glass-ceramic electrical interconnect structure is achieved at a relatively low manufacturing cost.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.