Hermetic power chip packages
US4646129A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 11, 1986 |
| Grant date | Feb 24, 1987 |
| Priority date | — |
| Expiry date | Jun 11, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/33181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Hermetic power chip packages are constructed in building block form to reduce the cost of electrical testing of power chips. The power chip packages utilized dielectric plates with metallic sheets bonded to the dielectric plates. Electric access to at least selected terminals of a power chip is gained through one of the dielectric plates by including holes through the plates which are filled with a conductive medium. One form of the hermetic package includes a gasket with a thermal expansion coefficient close to that of a dielectric plate of the hermetic package and thereby results in a high level of package durability even after repeated cycling of the package between widely differing hot and cold temperatures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.