Operand size mechanism for control simplification
US4649477A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 1985 |
| Grant date | Mar 10, 1987 |
| Priority date | — |
| Expiry date | Jun 27, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30036
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processor having size selector in a controller for explicitly selecting the size of an operand independent of an instruction in an instruction register, together with means for selectively enabling the instruction register or other functional block, or a size selector to select the size of the operand. A size bus and a size multiplexer are also provided to route the size instructions. By using this size mechanism, the amount of sequencing and control logic is significantly reduced from prior data processors. The mechanism allows operations of different sizes to be performed during a single instruction while allowing instruction dependent sizing to be done residually.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.