Apparatus for synchronizing linear PN sequences
US4649549A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 1984 |
| Grant date | Mar 10, 1987 |
| Priority date | — |
| Expiry date | Jul 18, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/707
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A system and method are disclosed for synchronizning the linear PN sequences contained in a received spread spectrum signal, characterized by the provision of a resident PN generator that is responsive to the chip rate clock for producing a replica of the PN sequence with arbitrary phase, a running matrix inverse of the matrix (R) formed by n successive observations of the register of the resident generator, and a matrix vector product device for multiplying the running inverse by a column vector of noisy chips, thereby to obtain a plurality of estimates of the phase vector. These estimates are smoothed and averaged to produce the smoothed phase vector (c.sub.j) that is applied to one input of a dot product device that operates in conjunction with the contents of the shift register of the resident generator to produce the properly phased PN sequence, which sequence is then supplied to despreading means for combining the noisy chips with the properly phased PN sequence. The system may be used for range computation, if desired.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.