Digital peak detecting means for a pulse train of electrical signals having a frequency within a known frequency bandwidth
US4651105A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 1, 1985 |
| Grant date | Mar 17, 1987 |
| Priority date | — |
| Expiry date | Nov 1, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/1816
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A digital peak detecting circuit for receiving a pulse train of electrical signals having a frequency within a known frequency range and for converting the same into digital signals is shown. The digital peak detecting circuit includes an input circuit having a phase-locked loop for producing clock pulses at a frequency which is a preselected integer of the electrical signals frequency and for deriving therefrom an analog input signal. A pulse control circuit receives and counts a predetermined number of clock pulses and produces count enabling signals. A peak detecting circuit is provided which includes a comparator which has the analog input signal and a analog output signal voltage applied to the inputs thereof and which has an output coupled to the pulse control circuit. A digital counting circuit is responsive to count enabling signals by changing count direction and produces discrete digital output signals which are stored in a latch register at the time the digital counting circuit changes its count direction. A digital-to-analog converter produces the analog output signal voltage and it is applied to the comparator input for comparing the analog input signal with the analog…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.