LSI memory circuit
US4651308A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 21, 1984 |
| Grant date | Mar 17, 1987 |
| Priority date | — |
| Expiry date | Nov 21, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a LSI memory having a memory cell matrix, an address buffer for receiving address data, row decoder and column decoder for decoding address data, and output buffer for receiving the column decoder output, there is provided a driver, connected to the column-decoder output, which drives the output as a horizontal read address; and a driver, connected to the column decoder output, which drives the output as vertical read address. Any one of the drivers can be selected according to a desired read direction. The output of the selected driver is supplied to a selector. The selector receives data read out from the memory cell matrix and outputs horizontal read data or vertical read data using the driver output as address data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.