Semiconductor memory device providing a selection circuit change-over arrangement
US4656606A · kind A · utility
4Cited by
1References
6Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Feb 14, 1984 |
| Grant date | Apr 7, 1987 |
| Priority date | — |
| Expiry date | Feb 14, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A read-only memory has a terminal for receiving a writing current and a data input/output terminal. In the writing operation, the writing current is supplied to the terminal which is different from the data input/output terminal. Therefore, a data output circuit can be constituted by an ECL circuit having a relatively low withstand voltage, and a selection circuit related to the reading operation is achieved by using an ECL circuit. Accordingly, the read-only memory performs the reading operation at high speeds. During the writing operation, a different selection circuit is used which can withstand high voltages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.