Total dielectric isolation for integrated circuits
US4661832A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 1986 |
| Grant date | Apr 28, 1987 |
| Priority date | — |
| Expiry date | Feb 6, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/763
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fully isolated dielectric structure for isolating regions of monocrystalline silicon from one another and method for making such structure are described. The structure uses a combination of recessed oxide isolation with pairs of parallel, anisotropic etched trenches which are subsequently oxidized and filled to give complete dielectric isolation for regions of monocrystalline silicon. The anisotropic etching preferably etches a buried N+ sublayer under the mnocrystalline silicon region and then the trench structure is thermally oxidized to consume the remaining N+ layer under the monocrystalline region and to fully isolate the monocrystalline silicon region between pairs of such trenches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.