Two state synchronizer
US4663546A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 1986 |
| Grant date | May 5, 1987 |
| Priority date | — |
| Expiry date | Feb 20, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A two stage synchronizer circuit for synchronizing an asynchronous input signal with a local clock signal includes a reference inverter for generating a reference signal, a first sense amplifier for amplifying the difference between the reference signal and the asynchronous input signal, buffer inverters coupled to the output on the sense amplifier, a second sense amplifier coupled to the output of the buffer inverters, and an output inverter for delivering the desired synchronized signal. The reference inverter and the first and second buffer inverters have the same switch point so as to substantially reduce the probability of the generation of a meta-stable output. Furthermore, the first and second sense amplifiers and output inverter also have the same switch point as the reference inverter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.