Decoding arrangements for synchronous receivers
US4663623A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 1984 |
| Grant date | May 5, 1987 |
| Priority date | — |
| Expiry date | Aug 3, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG08B3/1066
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
In a decoder suitable for use in a paging receiver of the type responsive to a transmission which includes a preamble sequence followed by batches each containing a synchronization word followed by a plurality of address and/or message words, the decoder is operative to detect a single synchronization word. Thereafter, the decoder is powered up to search in its specific frame in each batch by means of a clock which has been synchronized with the transmission and which provides the timing for searching in the specific frame of all subsequent batches. The clock may have coarse and fine modes of timing control, the coarse mode being applicable when initial bit synchronization is being attained, and the fine mode being applied subsequently to reduce the risk of the clock drifting out of synchronization.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.