Computing method and apparatus
US4667300A · kind A · utility
25Cited by
13References
33Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 27, 1983 |
| Grant date | May 19, 1987 |
| Priority date | — |
| Expiry date | Jul 27, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06E1/045
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An optical computing apparatus and method for high speed multiplication of numerical array, wherein the arrays to be multiplied are arranged according to a systolic processing or engagement processing format, and wherein the element multiplication is performed by analog convolution. In a preferred embodiment of the invention, the multiplication is implemented with first and second spacial light modulated devices which provide the selected processing format in one spacial dimension and binary multiplication by analog convolution in a second spacial dimension.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.