Dynamic digital video correction circuit
US4672451A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 12, 1985 |
| Grant date | Jun 9, 1987 |
| Priority date | — |
| Expiry date | Dec 12, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G1/002
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A video compensation circuit for compensating the displayed intensity of isolated pixels is disclosed. The video compensation circuit includes a shift register (20) having a plurality of stages (11,13,15) for storing and shifting a serially input digital video signal (DV) and for outputting an output digital video signal (DDV), detection circuitry (17) responsive to the respective outputs of the shift register stages for providing a detection output indicative of the presence of a predetermined sequence of digital video data in the shift register stages, and synchronizing circuitry (19) coupled to the detection circuit for providing in response to the detection output a control signal (DCS) synchronized to the bit of the output digital video signal which corresponds to the pixel to be compensated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.