Error correction system in a teletext system
US4672612A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Mar 26, 1985 |
| Grant date | Jun 9, 1987 |
| Priority date | — |
| Expiry date | Mar 26, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/43
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An error correction system for a difference set cyclic (272, 190) code with 190 data bits and 82 test bits in a packet which is transmitted on a vertical blanking interval of a television signal has been improved. The present system comprises a buffer memory for storing an original data which is subject to correction and corrected data, and an error correction circuit having at least a syndrome register, a majority circuit and a data register. The data transfer between the buffer memory and the error correction circuit is effected by wired logic hardware means without using software operation time of a programmed computer so that computer operation time is not wasted merely for error correction. A correction number counter is provided for counting the number of corrected bits for adjusting the threshold level for determining 1 or 0 of a reception signal, adjusting criterion of operation of the majority circuit in the error correction circuit, and the stopping of error correction operation in case of too many errors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.