Conditional-carry adder for multibit digital computer
US4675838A · kind A · utility
5Cited by
6References
5Claims
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Key dates
| Filing date | Nov 1, 1984 |
| Grant date | Jun 23, 1987 |
| Priority date | — |
| Expiry date | Nov 1, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/507
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multibit digital adder is shown wherein a pair of carry generating circuitries is disposed between single adders for each bit in the digital numbers to be added, each one of such carry generating circuitries being responsive to a different carry-in signal and to the level of the bits applied to the associated single bit adder to produce the proper carry-in signal to the following single bit adder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.