Programmable logic controller
US4675843A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 27, 1983 |
| Grant date | Jun 23, 1987 |
| Priority date | — |
| Expiry date | Dec 27, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05B2219/1172
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
The programmable logic controller uses a set of instructions which comprises only three instructions: a Read instruction and a Write instruction which includes an operation code, a condition bit, and an address, and a Jump instruction which includes an operation code and an address. When a Read instruction is read from control memory (10), a condition latch (35) is set to 1 or 0 depending on whether the level of the addressed input corresponds or not to the level of the condition bit. For a Write operation, the state of latch (35) or its inverse is provided at the addressed output in accordance with the value of the condition bit. A Jump instruction is executed only if the condition latch (35) is set to 1. A random access memory (50) may be utilized to function as one of the input multiplexers (RI0 to RI2) and one of the output demultiplexers (RO0 to RO2), which allows the controller to store events and to use said events later on.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.