Bus interface
US4675865A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 1985 |
| Grant date | Jun 23, 1987 |
| Priority date | — |
| Expiry date | Oct 4, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4213
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bus interface for interfacing between a processor and a shared bus is disclosed. The bus interface allows the exchange of data in the form of packets between the bus and the processor. An interface control device exchanges control data with the shared bus (e.g. identification signals, polling signals, control signals) in order to regulate accesses of the interface circuit to the shared bus. State machines (e.g. a transmitter and a receiver) including data pipelines, are responsive to control signals from the interface control device for exchanging data between the shared bus and a data storage device. An access control device both controls the flow of data between the processor and the data storage device and regulates access to the data storage device between the processor and the state machines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.