Synchronization slicer
US4677388A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 17, 1985 |
| Grant date | Jun 30, 1987 |
| Priority date | — |
| Expiry date | Oct 17, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R19/175
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
There is disclosed herein an apparatus and method for accurately ascertaining the time of occurrence of passage of the leading and trailing edges of an input pulse through the 50% amplitude level. The apparatus implements the transfer function 1 - cos(wt) where t is equal to the round trip delay through a delay line, and w is the angular velocity of each fourier component of the input signal. In one embodiment, a summing resistor and a delay line having a characteristic impedance equal to that of the resistor are used. The output of the delay line is coupled to one input of a comparator, and the other input is coupled to the junction between the summing resistor and the delay line. Another embodiment uses two matched delay lines, two factoring circuits, a summing circuit and a comparator to implement the same transfer function.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.