Plastic pin grid array chip carrier
US4677526A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 1, 1984 |
| Grant date | Jun 30, 1987 |
| Priority date | — |
| Expiry date | Mar 1, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A low cost injection-molded plastic pin grid array chip carrier is provided as an alternative to a ceramic pin grid array chip carrier, in which an electrically superior package is fabricated by supporting nested lead frames in the mold cavity at the centers of the lead frames through the provision of a central carrier for each of the nested lead frames, with the central carrier permitting a one shot molding process. In one embodiment the lead frames include square toroidal central carriers, with one set of nested lead frames being provided with offset leads such that all leads lie in the same plane in the package. Path resistance is lower than the ceramic pin grid array chip carrier because of the use of a copper lead frame as opposed to the sputtered tungsten used in ceramic packages. Interlead resistance is increased through the utilization of conical or pyramidal supports for the pins which lengthens the resistance paths between the leads. Due to the lower dielectric constant of plastic, the interlead capacitance is significantly reduced to permit higher speed operation and reduced cross-talk. The subject plastic pin grid array chip carrier is also electrically superior to a co…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.