Emitter coupled logic circuit with high drivability for capacitive load
US4678942A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 1985 |
| Grant date | Jul 7, 1987 |
| Priority date | — |
| Expiry date | Sep 23, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/086
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An ECL (Emitter Coupled Logic) circuit is provided which has an increased ability to drive a large capacitive load or to drive a large fan-out circuit, wherein the power consumption per gate is reduced. The output circuit of the ECL circuit is provided with an emitter follower transistor which has the current therethrough detected by a detecting transistor. A current control transistor is provided to quickly charge the load capacitance under the control of the detecting transistor, and thus, the voltage drop of the output signal is improved. One of the emitter follower transistor and the current transistor are always cut off when the other is in a conductive state, and therefore, the current running through the circuit is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.