Process for manufacturing isolated semi conductor components in a semi conductor wafer
US4679309A · kind A · utility
2Cited by
1References
3Claims
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Inventor
Key dates
| Filing date | Jun 18, 1984 |
| Grant date | Jul 14, 1987 |
| Priority date | — |
| Expiry date | Jun 18, 2004 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for manufacturing isolated semi conductor components in a semi conductor wafer of the type used in bipolar technology. In this process, polycrystalline silicon is deposited in a recess in a silicon substrate whose walls are insulated by a silicon nitride layer except for an opening formed in this nitride layer at the bottom of said recess. Then, the polycrystalline silicon is re-epitaxied so as to become monocrystalline silicon by thermal heating from the "nucleus" formed by the underlying silicon in said opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.