Thermoplastic plug method of fabricating an integrated circuit package having bonding pads in a stepped cavity
US4680075A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 21, 1986 |
| Grant date | Jul 14, 1987 |
| Priority date | — |
| Expiry date | Jan 21, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15787
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit package is fabricated by assembling a stack which is comprised of a plurality of thin flat epoxy-glass layers, adhesive layers between the epoxy-glass layers, and a staircase-shaped cavity. This cavity extends from an outer epoxy-glass layer to an internal epoxy-glass layer and goes parallel along a portion of the flat surface of the internal epoxy-glass layer and then penetrates through it. Conductors lie on the internal epoxy-glass layer, including bonding pads on the flat surface portions. After the stack is assembled, a plug is inserted into its cavity. This plug is thermoplastic; and it fits snugly into the cavity and extends over a larger area outside the cavity. While the plug is in the cavity, the stack is laminated at a temperature and pressure which causes the plug to soften and conform to the exact shape of the cavity. This dams the adhesive from flowing onto the bonding pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.