Silicon semiconductor component with an edge contour made by an etching technique, and method for manufacturing this component

US4680615A · kind A · utility

Assignee

• Brown, Boveri & Cie AG · DE

Inventors

• Oswald Gotzenbrucker · Worms, DE
• Gerhard Popp · Lampertheim, DE

Key dates

• Filing date: Jun 14, 1985
• Grant date: Jul 14, 1987
• Expiry date: Jun 14, 2005

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/978
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Silicon semiconductor component with a wafer-like silicon semiconductor body with an edge contour made by an etching technique. The component has a p-region parallel to a principal surface of the semiconductor body and has in this principal surface a passivating ditch, into which leads a pn-junction extending between the more heavily doped p-region and a less heavily doped n-region, in which the edge contour has in the vicinity of a flank length, between the emergence of the pn-junction into the passivating ditch and this principal surface of the semiconductor body, a small angle of inclination of 1.degree. to 7.degree.. The angle of inclination (.alpha.) of the edge contour is nearly uniform over the major part of the flank length (L) and the following relationships apply: PA1 L=(0.8 . . . 1.6).multidot.x.sub.n and PA1 H=(0.5 . . . 1.2).multidot.x.sub.p, where PA1 H=the height of the p-doped silicon layer over the pn-junction, measured in the center of the flank length (L), PA1 x.sub.n =the extent of the space charge zone into the n-region, PA1 x.sub.p =the extent of the space charge zone into the p-region at the cut-off voltage of the component.