Multi-function bus
US4680754A · kind A · utility
8Cited by
4References
1Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 3, 1985 |
| Grant date | Jul 14, 1987 |
| Priority date | — |
| Expiry date | Jun 3, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q11/0407
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
This disclosure depicts a multi-function bus for use with a central processor system, user devices having user interfaces and a host switching interface unit. The multi-function bus has a first pre-determined number of transmit and receive lines connecting the central processing system, the user interfaces and the host interfacing unit. A second pre-determined number of channels on each of the transmit and receive lines is provided for on the multi-function bus. A multi-function bus includes the transfer of information to and from the host switching system both in a serial mode and in a parallel mode on the multi-function bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.