Shock-resistant integrated circuit card
US4682017A · kind A · utility
11Cited by
1References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 24, 1985 |
| Grant date | Jul 21, 1987 |
| Priority date | — |
| Expiry date | Dec 24, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/48465
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shock-resistant integrated circuit card arranges an integrated circuit at a marginal edge region of the card where deformation forces are minimized. A flexible circuitboard interconnects the integrated circuit with exterior terminals spaced transversely away from the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.