Patent · US Expired

Method for interconnecting the active zones and gates of CMOS integrated circuits

US4682403A · kind A · utility

10Cited by

5References

7Claims

0Family size

Assignee

COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

Joel Hartmann · Le Pont-de-Claix, FR
Pierre Jeuch · Chauny, FR

Key dates

Filing date	Mar 25, 1985
Grant date	Jul 28, 1987
Priority date	—
Expiry date	Mar 25, 2005

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/0002
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method for interconnecting the active zones and/or gates of CMOS integrated circuits. The method comprises, during the formation of the gates in a first conductive coating, defining in the latter the dimensions of the connections to be produced, and wherein following the formation of the active zones, the gates are laterally insulated and then a second conductive coating producing the desired connections is deposited on the complete circuit, with the exception of the lateral insulation.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.