Impedance maintenance circuit for telephone interface
US4683351A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 4, 1985 |
| Grant date | Jul 28, 1987 |
| Priority date | — |
| Expiry date | Oct 4, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M19/08
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Circuitry for supplying power to low-level DIALER portions of a telecommunications integrated circuit device comprises a PNP current sourcing transistor mirrored to a bypass transistor. The bypass transistor is coupled across the TIP and RING terminals of the subscriber line so as to maintain current flow sufficient to prevent the central office from "dropping out". A sensing transistor drives a current sink coupled to the current sourcing transistor in order to prevent that transistor from dropping into saturation and degrading the necessarily high impedance level that must be presented across the subscriber line. Saturation is prevented through the operation of a circuit loop that includes the base-collector junction of the current sourcing transistor, the emitter to-base junction of the sensing transistor, and a voltage offset element. When the base-collector voltage of the current sourcing transistor approaches to a predetermined level determined by the voltage offset, the level chosen to be indicative of a tendency toward saturation, the sensing transistor begins to conduct, thereby driving a current sink into conduction and imposing an additional load on the current sourcing …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.