Process of fabricating MOS devices having shallow source and drain junctions
US4683645A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 24, 1985 |
| Grant date | Aug 4, 1987 |
| Priority date | — |
| Expiry date | Dec 24, 2005 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a metal oxide semiconductor field effect transistor fabrication process, refractory metal is deposited over designated source and drain areas within a silicon substrate. Refractory metal and silicon at the interface is then mixed by ion implantation of a heavy neutral ion species such as germanium. To minimize source/drain junction depth, the source and drain locations can be subjected to bombardment by a lighter ion such as silicon which amorphizes silicon to a predetermined depth under the designated source and drain regions and so substantially confines dopant diffusion to the silicon amorphized region. To render the source and drain of desired conductivity type, an ion implantation of a non-neutral ion is then performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.