Non-volatile amorphous semiconductor memory device utilizing a forming voltage
US4684972A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 1985 |
| Grant date | Aug 4, 1987 |
| Priority date | — |
| Expiry date | Jun 24, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D48/381
Abstract
A semiconductor device comprising superimposed layers of p- and n-doped semiconducting material (e.g. silicon) and electrical contact means for applying an electrical potential across the superimposed layers is characterized in that the p- and n-doped layers are both of amorphous semiconducting mateial (e.g. silicon) and one of said layers is much more heavily doped than the other. Suitably the less heavily doped layer has a thickness which is not greater than 2 .mu.m and the dopant concentration in the more heavily doped layer is one hundred or more times the dopant concentration of the less heavily doped layer. Preferably a third or quasi-intrinsic layer or substantially undoped amorphous semiconducting material (e.g. silicon) or electrically insulating material is applied to one of the doped layers between that layer and its electrical contact means. The device can be used as an electrically-programmable non-volatile semiconductor memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.