Method for the localization of time-critical events within a clock electronic circuit
US4686455A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 2, 1984 |
| Grant date | Aug 11, 1987 |
| Priority date | — |
| Expiry date | Aug 2, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/305
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Time-critical events are localized within a clocked electronic circuit without requiring cyclical operation By way of measuring at the outputs of the circuit, the limit frequency of the circuit is identified. A test pattern sequence is then applied to this circuit. The number n of that test pattern at which errors are perceived at the outputs is identified, in particular with a clock frequency higher than the identified limit frequency of the circuit. The test patterns having the numbers n-m are applied to the circuit with a clock frequency greater than the identified limit frequency of the circuit and the remaining n test patterns are applied to the circuit with a clock frequency lower than the identified limit frequency of the circuit, being applied thereto in succession step-by-step with m=1,2,3 . . . in at least one run of n test patterns. A check is carried out after every run of a test pattern sequence of n test patterns as to whether an error still exist at the output until an error can no longer be documented at the output and a determination is thus made with respect to which test pattern having the number n-m the error is generated within the -circuit. An error tracking t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.