Single bit storage and retrieval with transition intelligence
US4688191A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 3, 1983 |
| Grant date | Aug 18, 1987 |
| Priority date | — |
| Expiry date | Nov 3, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05B2219/1172
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A peripheral processor for a central processing unit is in the form of a memory which is repetitively loaded with data scanning an array. The processor performs predefined logical operations between respective elements of successive scans of data. Preferably address signals sent to the peripheral processor via a preassigned set of address lines specify a desired one of a plurality of predetermined logical operations. Logical operations may also be performed when data is written to processor memory as well as read from the processor. A memory shift register, for example, automatically transfers original data from present scan memory to past scan memory when new data is loaded into present scan memory. In the field of machine control, the processor permits single-bit storage and retrieval with respect to a byte oriented memory and also detects individual bit transitions, thereby facilitating manipulation of single bit input/output data and the conditioning of machine control operations based on the occurrence of bit transitions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.